Recently, there have been increasing needs for downsizing and thinning of semiconductor devices. Further, a method for increasing packaging density by laminating a plurality of semiconductors has been widely used. As a method for responding to such needs, a technique for forming a penetrating electrode which penetrates a semiconductor wafer from an electrode pad formed on a front face of a semiconductor device and connected to a back face of the semiconductor device is noted.
For example, Japanese Patent Publication 3186941 (publication date: Aug. 20, 1996) discloses a technique for forming a penetrating hole which penetrates a semiconductor substrate from a back face to an electrode formed on a front face, covering an inner wall of the penetrating hole with an insulating film, and then filling the inside of the penetrating hole with metal, so as to form a penetrating electrode. The penetrating electrode forms a bump which protrudes on the back face of the semiconductor substrate. Further, the Japanese Patent No. 3186941 also discloses a multi-chip module which realizes high density by laminating a plurality of semiconductor chips which include thus fabricated penetrating electrodes.
Further, Japanese Laid-Open Patent Publication 2003/309221 (publication date: Oct. 31, 2003) discloses a method for fabricating a BGA (Ball Grid Array) semiconductor device with a penetrating electrode. Further, Japanese Laid-Open Patent Publication 2003/309221 discloses a technique for forming a penetrating hole which penetrates a semiconductor substrate from a back face to an electrode formed on a front face, forming an oxide film on an inner wall of the penetrating hole and on a back face of the electrode using CVD, and then etching, by anisotropic etching, only an oxide film attached to the back face of the electrode, so that an oxide film on a side wall remains. After that, a metallic layer is formed inside the hole, and thereby a penetrating electrode which connects the front face and back face of the semiconductor substrate is formed.
Further, recently, there has been an increasing need for downsizing and thinning of small camera modules, represented by mobile phones. For example, Japanese Laid-Open Patent Publication 2001/351997 (publication date: Dec. 21, 2001) discloses a packaging structure of a small solid-state image sensor (a light receiving sensor) having a penetrating hole.
The first point of the technique disclosed in Japanese Laid-Open Patent Publication 2001/351997 is such that an electrode for input/output to and from the outside, on a face for forming a light receiving sensor, is taken out to a back face using a penetrating electrode which penetrates a Si substrate. As a result, wire bonding or the like which was necessary in conventional techniques becomes unnecessary, and accordingly a packaging area can be made as small as a semiconductor chip size and downsizing can be realized.
The second point of Japanese Laid-Open Patent Publication 2001/351997 is that by forming a light transmitting protective part on a light receiving sensor, it is possible to prevent foreign matter, such as dirt, from attaching on the light receiving sensor in and after this process. As such, it is possible to carry out processes in an environment with low cleanness, after the light transmitting protective part is formed.
In this way, a process for forming a penetrating electrode is noted for realizing downsizing and thinning of not only memories but also a variety of devices such as image sensors.
However, conventional techniques for forming a penetrating electrode, as described above, have the following problem. In order to explain this problem, first, an example of a structure of a semiconductor device provided with a penetrating electrode is illustrated in FIG. 9.
FIG. 9 is a cross sectional structure view illustrating the surroundings of an electrode section of a semiconductor device having a penetrating electrode. Generally, a first insulating film 102 is formed on a first face (corresponding to a front face of a substrate) of a semiconductor wafer 101, and a metallic wire layer having a multi-layered structure is formed on the first insulating film 102. An electrode pad 103 for performing signal input/output of a semiconductor chip is formed on the metallic wire layer, and the penetrating electrode is formed in a region of the electrode pad 103. Further, a protective film 104 made of an oxide film or a nitride film is formed on the metallic wire layer.
In the semiconductor wafer 101, a penetrating hole is formed immediately below the electrode pad 103, and a second insulating film 105 is formed so as to cover an inner wall of the penetrating hole and a second face (corresponding to a back face of the substrate) of the semiconductor wafer 101. Further, a conductor layer 106 is formed from the inner wall of the penetrating hole to the second face of the semiconductor wafer 101, and the conductor layer 106 on the inner wall of the penetrating hole serves as the penetrating electrode. The conductor layer 106 on the second face of the semiconductor wafer 101 is connected with an external input/output terminal 107, and on the second face of the semiconductor wafer 101, by use of an insulating film 108, only the external input/output terminal 107 is exposed. As such, the electrode pad 103 on the first face of the semiconductor wafer 101 and the external input/output terminal 107 on the second face of the semiconductor wafer 101 are in communication with each other via the conductor layer 106.
In forming the semiconductor device with a structure illustrated in FIG. 9, the second insulating film 105 is formed on the semiconductor wafer 101, from the second face side, by using CVD (Chemical Vapor Deposition). At this time, the first insulating film 102, the electrode pad 103, and the protective film 104 have already been formed on the semiconductor wafer 101.
However, in this case, as illustrated in FIG. 10(a), the second insulating film 105 is formed on a back face of the electrode pad 103 which is to communicate via the penetrating electrode. Therefore, there is a need to remove the second insulating film 105 formed on the back face of the electrode pad 103 and to leave the second insulating film 105 formed on the inner wall of the penetrating hole, as illustrated in FIG. 10(b). Here, there are several methods for removing the second insulating film 105 formed on the back face of the electrode pad 103.
A first method is painting resist on the back face of the semiconductor wafer, opening the resist on the inner side of the penetrating hole by use of a photo process, and removing the insulating film on the back face of the electrode pad using dry etching.
A second method is etching only the insulating film of the back face of the electrode, by anisotropic etching, without etching the insulating film on the sidewall of the penetrating hole. Japanese Patent Publication 3186941 and Japanese Laid-Open Patent Publication 2001/351997 use the second method.
However, in the first method, when resist is evenly painted on a back face of a semiconductor wafer having a penetrating hole, it is difficult to evenly fill resist into the penetrating hole. Particularly, the more minute the penetrating electrode becomes, the more difficult it becomes to fill resist into the penetrating hole and open the resist in the penetrating hole by development.
Generally, a size of an electrode of a semiconductor device is not more than about 100 μm square for the most part. Thicknesses of semiconductor wafers vary, but are usually about 100 through 700 μm. For example, when a penetrating hole whose size is 70 μm square is formed in a semiconductor wafer whose thickness is 100 μm, it is difficult to evenly paint resist in the inside of this minute hole. The difficulty further increases when an electrode is a smaller hole, whose diameter is 10 μm and whose depth is approximately 50 μm.
Further, even when it is possible to evenly fill the resist in the inside of the minute penetrating hole, it is difficult for developer to circulate in a hole with this aspect ratio. As such, it is difficult to open the resist by development.
Further, when the second method is used, it is thought that an opening can be easily made in an insulating film on a back face of an electrode pad, compared with the first method.
However, when the second insulating film is formed by forming an oxide film inside the penetrating hole using CVD, a thickness of the insulating film on the inner wall of the penetrating hole becomes thinner than that of the insulating film on the back face of the semiconductor wafer. Further, when the insulating film on the back face of the electrode pad is etched using anisotropic etching, an etching rate of the insulating film on the back face of the semiconductor wafer is faster than that of the insulating film on the back face of the electrode pad at the bottom of the hole, and accordingly the insulating film on the back face of the semiconductor wafer is also etched. Further, even though anisotropic etching is used, it is inevitable that the insulating film on the inner wall of the penetrating hole is reduced by etching.
Therefore, it is necessary to form in advance a thick insulating film on the back face of the semiconductor wafer or to reform the insulating film on the semiconductor wafer after the insulating film on the back face of the electrode pad is removed by etching. This leads to the disadvantage of increased fabrication cost.